The present invention relates to a phase-lock loop device which is for phase locking a device input signal representing a device input complex number and having a device input phase into a phase locked signal representing another complex number and having a locked phase which are related to the device input complex number and the device input phase.
A conventional phase-lock loop device of the type described, generally comprises a complex multiplier, a low-pass filter, an integrator, and a complex converter.
The complex multiplier is supplied with the device input signal and a multiplier input signal which will be presently be described. The complex multiplier calculates a product of the device input signal and the multiplier input signal to produce a complex product signal representative of the product.
The low-pass filter is connected to the complex multiplier to filter the complex product signal into a filtered signal. The integrator is connected to the low-pass filter and integrates the filtered signal into an integrated signal.
The complex converter is connected to the integrator and converts the integrated signal to a converted signal to deliver the converted signal back to the complex multiplier as the multiplier input signal.
In the conventional phase-lock loop device, it will be assumed that the device input signal has a frequency greatly different from that of the multiplier input signal. In this event, operation of locking the device input phase is impossible or, if possible, will take a very long time.